http://www.physorg.com/news109253804.html
Cant help but think if it develops
an open in the wire. What
recourse will there be ? What are the cross talk issues if any ?
Does the material pin over usage and time ?
How does one make contacts to these nanowires?
Connections are grown, just like the wires. First they put down the wires, then the components. All self assembling. Neat trick, that.
I foresee this as one of the foundations on practical interstellar travel. It will certainly lighten up the load for space bound electronics, making them smaller, lighter, faster and more durable all at the same time. Once this is perfected, we're in for another major milestone in electronics. Imagine: an computer system imbedded in your body with a neural/sub vocal interface, sattellite based WiFi, and built in Flash ROMable BIOS so you can upgrade as improvements come along. You could call home by merely saying 'call home'. Perhaps we can build in a GPS receiver so nobody will ever have to stop you on the street and ask how to get to anywhere. Homing Humans... one up on the humble pigeon, eh? I'm sure the millitary will jump on this idea fast. Think of the improved communications in the field. Silent, effective communications from anywhere, to anywhere, via sattellite. With some mil spec encryption, this would be a very powerful device for a soldier to have. And it would be embedded, so it will be undetectable by an enemy if captured. Downed pilots and other personnell trapped behind enemy lines would be tracked continuously, so we would always know exactly where they are at all times. Might cut down on dissertion rates, too.
I foresee this as one of the foundations on practical interstellar travel. It will certainly lighten up the load for space bound electronics, making them smaller, lighter, faster and more durable all at the same time. Once this is perfected, we're in for another major milestone in electronics. Imagine: an computer system imbedded in your body with a neural/sub vocal interface, sattellite based WiFi, and built in Flash ROMable BIOS so you can upgrade as improvements come along. You could call home by merely saying 'call home'. Perhaps we can build in a GPS receiver so nobody will ever have to stop you on the street and ask how to get to anywhere. Homing Humans... one up on the humble pigeon, eh? I'm sure the millitary will jump on this idea fast. Think of the improved communications in the field. Silent, effective communications from anywhere, to anywhere, via sattellite. With some mil spec encryption, this would be a very powerful device for a soldier to have. And it would be embedded, so it will be undetectable by an enemy if captured. Downed pilots and other personnell trapped behind enemy lines would be tracked continuously, so we would always know exactly where they are at all times. Might cut down on dissertion rates, too.
If it's purely grown, it sounds more suitable to biology than chips. On a chip, everything has to be nicely laid out.
I heard it's especially important for phase change memory, since the thermal environment cannot afford to be random.
I heard it's especially important for phase change memory, since the thermal environment cannot afford to be random.
This article lacks the crucial details, including pictures.
Yea! I want pictures of a wire 100 atoms wide! Geeze 
When there is a phase change, there is a volume change right? Like water expands when it crystallizes. Shouldn't there be stresses due to phase changes which might cause the cell to bust?
The goodies are on Nature Nano at
Abstract Highly scalable non-volatile and ultra-low-power phase-change nanowire memory. Se-Ho Lee1,2, Yeonwoong Jung1,2 & Ritesh Agarwal1
Images
Bottom line:
Nonvolatile storage with hysteretic phase change between amorphous and crystaline states in 30 nm wide Ge2Sb2Te5 nanowires.
Set: 100 ns * 0.2mA changes resistance from 27 kohm to 1.6 Mohm.
Clear: 300 ns * 0.2 mA reverts at a 2.2V threshold
Read: low current read at 0.2 V (speed not identified, but presumably much faster than write)
Abstract Highly scalable non-volatile and ultra-low-power phase-change nanowire memory. Se-Ho Lee1,2, Yeonwoong Jung1,2 & Ritesh Agarwal1
Images
Bottom line:
Nonvolatile storage with hysteretic phase change between amorphous and crystaline states in 30 nm wide Ge2Sb2Te5 nanowires.
Set: 100 ns * 0.2mA changes resistance from 27 kohm to 1.6 Mohm.
Clear: 300 ns * 0.2 mA reverts at a 2.2V threshold
Read: low current read at 0.2 V (speed not identified, but presumably much faster than write)
Only 10^5 cycles?
great ~~ 
SongDog, try to give links that all can visit.
Those were paying links i presume?
As nature refused to show them..
And putting nanowires in your body???
You're sure about that?
A good idea i mean?
Those were paying links i presume?
As nature refused to show them..
And putting nanowires in your body???
You're sure about that?
A good idea i mean?
I doubt phase change memory will really become a high-volume technology like CMOS. And the reason is precisely because of CMOS.
Table 43a here says a current of ~0.1 mA is required for phase change memory at a design rule of ~50 nm = 0.05 micron design rule. Even this small a current is difficult to operate phase change memory today, because a current density of ~10^7 A/cm^2 is needed.
However, an Intel NMOS transistor gives something like 1 mA/micron which when multiplied by the design rule gives 0.05 mA. This is insufficient for the previous 0.1 mA requirement. A 0.1 mA requirement means a 100 nm wide transistor is needed. But that would be incompatible with the density of Flash and DRAM today.
Table 43a here says a current of ~0.1 mA is required for phase change memory at a design rule of ~50 nm = 0.05 micron design rule. Even this small a current is difficult to operate phase change memory today, because a current density of ~10^7 A/cm^2 is needed.
However, an Intel NMOS transistor gives something like 1 mA/micron which when multiplied by the design rule gives 0.05 mA. This is insufficient for the previous 0.1 mA requirement. A 0.1 mA requirement means a 100 nm wide transistor is needed. But that would be incompatible with the density of Flash and DRAM today.