An engineer told me this this rule which was pretty easy to remember:

If you had a 25 mm X 25 mm square, and you stuffed it with 25 nm half-pitch cells, you would get a total of 25 X 10^10 cells (250 Gb or 250 billion cells).

It was the so called "25-25-25-10-10" rule. The lithography scanner field is 26 mm X 33 mm. And of course, real chips would not be stuffed full with dense cells, there would have to be some logic, etc. We already have tens of billions of transistors on a chip today, so it looks like we are quite close to (if not already at) the limit of profitability of the current semiconductor manufacturing infrastructure.

Looks like we hit your limit today 32 billion transistors at 25 nm half-pitch (64Gb) on 167 mm^2 die. Have to see how profitable it is later this year.